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Basic Info.
Product Description
The FAN73892 is a monolithic three-phase half-bridge gate-drive IC designed for high-voltage, high-speed,driving MOSFETs and IGBTs operating up to +600 V.Fairchild's high-voltage process and common-mode noise-canceling technique provide stable
operation of high-side drivers under high-dv/dt noise circumstances.An advanced level-shift circuit allows high-side gate driver operation up to VS = -9.8 V (typical) for VBS =15 V.The protection functions include under-voltage lockout and inverter over-current trip with an automatic faultclear function. Over-current protection that terminates all six outputs can be derived from an external currentsense resistor. An open-drain fault signal is provided to indicate that an over-current or under-voltage shutdown
has occurred. The UVLO circuits prevent malfunction when VDD and VBS are lower than the threshold voltage.Output drivers typically source and sink 350 mA and 650 mA, respectively; which is suitable for three-phase half-bridge applications in motor drive systems.
1.Pin diagram:
2.Absolute Maximum Ratings:
Stresses exceeding the Absolute Maximum Ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only. TA=25°C, unless otherwise specified.
| Symbol | Parameter | Min. | Max. | Unit |
| Vs | High-Side Floating Offset Voltage | VB1,2,3-25 | VB1,2,3+0.3 | V |
| Vb | High-Side Floating Supply Voltage | -0.3 | 625.0 | V |
| Vdd | Low-Side and Logic-Fixed supply voltage | -0.3 | 25.0 | V |
| V(ho) | High-Side Floating Output Voltage VHO1,2,3 | VS1,2,3-0.3 | VB1,2,3+0.3 | V |
| V(lo) | Low-Side Floating Output VoltageVLO1,2,3 | -0.3 | VDD+0.3 | V |
| V(in) | Input Voltage ( , , CS, and EN) | -0.3 | 5.5 | V |
| V(FO) | Fault Output Voltage ( FO) | -0.3 | VDD+0.3 | V |
| PW(HIN ) | High-Side Input Pulse Width | 500 | ns | |
| dVs/dt | Allowable Offset Voltage Slew Rate | ±50 | V/ns | |
| P(D) | Power Dissipation(2,3) | 1.4 | W | |
| θ(JA) | Thermal Resistance | 70 | °C/W | |
| T(J) | Junction Temperature | 150 | °C | |
| T(STG ) | Storage Temperature | -55 | 150 | °C |
Notes:
2. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material). Refer to the following standards:
JESD51-2: Integral circuit's thermal test method environmental conditions, natural convection;
JESD51-3: Low effective thermal conductivity test board for leaded surface-mount packages.
3. Do not exceed maximum power dissipation (PD) under any circumstances.
3.Electrical Characteristics:
VBIAS (VDD, VBS1,2,3) = 15.0 V and TA = 25°C unless otherwise specified. The VIN and IIN parameters are referenced to COM and are applicable to all six channels. The VO and IO parameters are referenced to VS1,2,3 and COM and are applicable to the respective output leads: HO1,2,3 and LO1,2,3. The VDDUV parameters are referenced to COM. The VBSUV parameters are referenced to VS1,2,3.
| Symbol | Parameter | Condition | Min. | Typ. | Max. | Unit |
| Low-Side Power Supply Section | ||||||
| I(QDD) | Quiescent V(DD) Supply Current | V(LIN1,2,3)=0 V or 5 V, EN=0 V | 200 | μA | ||
| I(PDD) | Operating V(DD) Supply Current | f(LIN1,2,3)=20 kHz, rms Value | 500 | μA | ||
| V(DDUV+) | V(DD) Supply Under-Voltage Positive-Going Threshold | V(DD)Sweep | 7.5 | 8.5 | 9.3 | V |
| V(DDUV-) | V(DD)Supply Under-Voltage Negative-Going Threshold | V(DD)=Sweep | 7.0 | 8.0 | 8.7 | V |
| V(DDHYS) | V(DD) Supply Under-Voltage Lockout Hysteresis | V(DD)=Sweep | 0.5 | V | ||
| Bootstrapped Power Supply Section | ||||||
| V(BSUV+) | V(BS) Supply Under-Voltage Positive-Going Threshold | V(BS1,2,3)=Sweep | 7.5 | 8.5 | 9.3 | V |
| V(BSUV-) | V(BS)Supply Under-Voltage Negative-Going Threshold | V(BS1,2,3)=Sweep | 7.0 | 8.0 | 8.7 | V |
| V(BSHYS) | V(BS) Supply Under-Voltage Lockout Hysteresis | V(BS1,2,3)=Sweep | 0.5 | V | ||
| I(LK) | Offset Supply Leakag Current | V(B1,2,3)=V(S1,2,3)=600 V | 10 | μA | ||
| I(QBS) | Quiescent V(BS) Supply Current | V(HIN1,2,3)=0 V or 5 V, EN=0 V | 10 | 50 | 80 | μA |
| I(PBS) | Operating V(BS) Supply Current | f(HIN1,2,3)=20 kHz, rms Value | 200 | 320 | 480 | μA |
| Gate Driver Output Section | ||||||
| V(OH) | High-Level Output voltage, V(BIAS)-V(O ) | I(O)=0 mA (No Load) | 100 | mV | ||
| V(OL) | Low-Level Output voltage, V(O) | I(O)=0 mA (No Load) | 100 | mV | ||
| I(O+) | Output HIGH Short-Circuit Pulse Current(4) | V(O)=15 V, V(IN)=0 V with PW≤10 µs | 250 | 350 | mA | |
| I(O-) | Output LOW Short-Circuit Pulsed Current(4) | V(O)=0 V, V(IN)=5 V with PW≤10 µs | 500 | 650 | mA | |
| V(S) | Allowable Negative VS Pin Voltage for HIN Signal Propagation to HO | -9.8 | -7.0 | V | ||
| Logic Input Section | ||||||
| V(IH) | Logic "0" Input Voltage | 2.5 | V | |||
| V(IL) | Logic "1" Input Voltage | 0.8 | V | |||
| I(IN+) | Logic Input Bias Current (HO=LO=HIGH) | V(IN)=0 V | 100 | μA | ||
| I(IN-) | Logic Input Bias Current (HO=LO=LOW) | V(IN)=5 V | 8.5 | 25 | μA | |
| R(IN) | Logic Input Pull-Up Resistance | 50 | KΩ | |||
| Enable Control Section (EN) | ||||||
| V(EN+) | Enable Positive-Going Threshold Voltage | 2.5 | V | |||
| V(EN-) | Enable Negative-Going Threshold Voltage | 0.8 | V | |||
| I(EN+) | Logic Enable "1" Input Bias Current | V(EN)=5 V (Pull-Down=150KΩ) | 33 | μA | ||
| I(EN-) | Logic Enable "0" Input Bias Current | V(EN)=0 V | 2 | μA | ||
| Over-Current Protection Section | ||||||
| V(CSTH+) | Over-Current Detect Positive Threshold(4) | 400 | 500 | 600 | mV | |
| V(CSTH-) | Over-Current Detect Negative Threshold(4) | 440 | mV | |||
| V(CSHYS) | Over-Current Detect Hysteresis(4) | 60 | mV | |||
| I(CSIN) | Short-Circuit Input Current | V(CSIN)=1 V | 5 | 10 | 15 | μA |
| I(SOFT) | Soft Turn-Off Sink Current | 25 | 40 | 55 | mA | |
| Fault Output Section | ||||||
| V(RCINTH+) | RCIN Positive-Going Threshold Voltage | 3.3 | V | |||
| V(RCINTH-) | RCIN Negative-Going Threshold Voltage | 2.6 | V | |||
| V(RCINHYS) | RCIN Hysteresis Voltage | 0.7 | V | |||
| I(RCIN) | RCIN Internal Current Source | C(RCIN)=2 nF | 3 | 5 | 7 | µA |
| V(FOL) | Fault Output Low Level Voltage VCS=1 V, IFO=1.5 mA | 0.2 | 0.5 | V | ||
| R(DSRCIN) | RCIN On Resistance | I(RCIN)=1.5 mA | 50 | 75 | 100 | Ω |
| R(DSFO) | Fault Output On Resistance | I(FO)=1.5 mA | 90 | 130 | 170 | Ω |
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